Currently, digital chips handle the off-and-on electronic pulses that translate the 1's and 0's of computer code into instructions for computing devices.

The problem is that this chip doesn't handle the UI very well.

The chip handles the necessary translation between local and off-board ccHT communications.

The chips also can handle video.

The chips on the birds can handle the extra code, no sweat, right, Mr. Olson?

Anyway, the chip maker tries to fine tune the manufacturing process so that as many chips as possible can handle the higher speed rating.

The future chip would handle two billion instructions per second.

This chip handles all the data needed to authenticate a charge.

The goal is to have the best-suited chip handle the processing, but how do you know which is best?

I have serious doubts the new chip could handle that, at least not without active cooling and much worse battery life.